Beaglebone: Header Files

6/22/2016
Andrew B. Wright, Ph. D., SM ’88

I’m going to accumulate all those useful header files on this blog.

Here is the archive.

pru_gpio.h is the header that allows you to use the gpio functions from within the pru.

typedef struct{

	union {
		volatile unsigned REVISION;

		volatile struct {
			unsigned MINOR : 6;
			unsigned CUSTOM: 2;
			unsigned MAJOR: 3;
			unsigned RTL: 5;
			unsigned FUNC: 12;
			unsigned rsrvd: 2;
			unsigned SCHEME: 2; 
		} REVISION_bit;
	} ; //0h - 3h, reset: 50600801h
	unsigned rsrvd0[3]; //4h-fh
	union{
		volatile unsigned SYSCONFIG; 
		volatile struct{
			unsigned AUTOIDLE: 1;
			unsigned SOFTRESET: 1;
			unsigned ENAWAKEUP: 1;
			unsigned IDLEMODE: 2;
			unsigned rsrvd: 27;
		} SYSCONFIG_bit;
	} ;//10h-13h, reset: 0h
	unsigned rsrvd1[3]; //13h-1fh
	union{
		volatile unsigned EOI; 
		volatile struct{
			unsigned DMAEVENT_Ack: 1;
			unsigned rsrvd: 31;
		} EOI_bit;
	} ;//20h-23h, reset: 0h
	volatile unsigned IRQSTATUS_RAW_0; //24h-27h, reset: 0h
	volatile unsigned IRQSTATUS_RAW_1; //28h-2Bh, reset: 0h
	volatile unsigned IRQSTATUS_0; //2Ch-2Fh, reset: 0h
	volatile unsigned IRQSTATUS_1; //30h-33h, reset: 0h
	volatile unsigned IRQSTATUS_SET_0; //34h-37h, reset: 0h
	volatile unsigned IRQSTATUS_SET_1; //38h-3Bh, reset: 0h
	volatile unsigned IRQSTATUS_CLR_0; //3Ch-3Fh, reset: 0h
	volatile unsigned IRQSTATUS_CLR_1; //40h-43h, reset: 0h
	volatile unsigned IRQWAKEN_0; //44h-47h, reset: 0h
	volatile unsigned IRQWAKEN_1; //48h-4Bh, reset: 0h
	unsigned rsrvd2[0x32]; //4Ch-113h
	union{
		volatile unsigned SYSSTATUS;
		volatile struct{
			unsigned RESETDONE: 1;
			unsigned rsrvd: 31;
		} SYSSTATUS_bit;
	} ; //114h-117h
	unsigned rsrvd3[0x6]; //118h-12fh
	union{
		volatile unsigned CTRL;
		volatile struct {
			unsigned DISABLEMODULE: 1;
			unsigned GATINGRATIO: 2;
			unsigned rsrvd: 29;
		} CTRL_bit;
	} ; //130h-133h
//	volatile unsigned OE; //134h-137h, reset: ffffffffh
	union{
		volatile unsigned OE;
		volatile struct{
			unsigned OE_bit0: 1;
			unsigned OE_bit1: 1;
			unsigned OE_bit2: 1;
			unsigned OE_bit3: 1;

			unsigned OE_bit4: 1;
			unsigned OE_bit5: 1;
			unsigned OE_bit6: 1;
			unsigned OE_bit7: 1;

			unsigned OE_bit8: 1;
			unsigned OE_bit9: 1;
			unsigned OE_bita: 1;
			unsigned OE_bitb: 1;

			unsigned OE_bitc: 1;
			unsigned OE_bitd: 1;
			unsigned OE_bite: 1;
			unsigned OE_bitf: 1;

			unsigned OE_bit10: 1;
			unsigned OE_bit11: 1;
			unsigned OE_bit12: 1;
			unsigned OE_bit13: 1;

			unsigned OE_bit14: 1;
			unsigned OE_bit15: 1;
			unsigned OE_bit16: 1;
			unsigned OE_bit17: 1;

			unsigned OE_bit18: 1;
			unsigned OE_bit19: 1;
			unsigned OE_bit1a: 1;
			unsigned OE_bit1b: 1;

			unsigned OE_bit1c: 1;
			unsigned OE_bit1d: 1;
			unsigned OE_bit1e: 1;
			unsigned OE_bit1f: 1;
		} OE_bit;
	}; //134h-137h, reset: ffffffffh	
	volatile unsigned DATAIN; //138h-13Bh, reset: 0h
	volatile unsigned DATAOUT; //13Ch-13Fh, reset: 0h
	volatile unsigned LEVELDETECT0; //140h, reset: 0h
	volatile unsigned LEVELDETECT1; //144h, reset: 0h
	volatile unsigned RISINGDETECT; //148h-14Bh, reset: 0h
	volatile unsigned FALLINGDETECT; //14ch-14fh, reset: 0h
	volatile unsigned DEBOUNCENABLE; //150h-153h, reset: 0h
	union{
		volatile unsigned DEBOUNCINGTIME; 
		volatile struct{
			unsigned DEBOUNCETIME: 8;
			unsigned rsrvd: 24;
		} DEBOUNCINGTIME_bit; 
	} ;//154h-157h
	unsigned rsrvd4[0xE];//158h-18fh
	union{
		volatile unsigned CLEARDATAOUT;
		volatile struct{
			unsigned CD_bit0: 1;
			unsigned CD_bit1: 1;
			unsigned CD_bit2: 1;
			unsigned CD_bit3: 1;

			unsigned CD_bit4: 1;
			unsigned CD_bit5: 1;
			unsigned CD_bit6: 1;
			unsigned CD_bit7: 1;

			unsigned CD_bit8: 1;
			unsigned CD_bit9: 1;
			unsigned CD_bita: 1;
			unsigned CD_bitb: 1;

			unsigned CD_bitc: 1;
			unsigned CD_bitd: 1;
			unsigned CD_bite: 1;
			unsigned CD_bitf: 1;

			unsigned CD_bit10: 1;
			unsigned CD_bit11: 1;
			unsigned CD_bit12: 1;
			unsigned CD_bit13: 1;

			unsigned CD_bit14: 1;
			unsigned CD_bit15: 1;
			unsigned CD_bit16: 1;
			unsigned CD_bit17: 1;

			unsigned CD_bit18: 1;
			unsigned CD_bit19: 1;
			unsigned CD_bit1a: 1;
			unsigned CD_bit1b: 1;

			unsigned CD_bit1c: 1;
			unsigned CD_bit1d: 1;
			unsigned CD_bit1e: 1;
			unsigned CD_bit1f: 1;
		} CD_bit;
	}; //190h-193h	

	union{
		volatile unsigned SETDATAOUT;
		volatile struct{
			unsigned SD_bit0: 1;
			unsigned SD_bit1: 1;
			unsigned SD_bit2: 1;
			unsigned SD_bit3: 1;

			unsigned SD_bit4: 1;
			unsigned SD_bit5: 1;
			unsigned SD_bit6: 1;
			unsigned SD_bit7: 1;

			unsigned SD_bit8: 1;
			unsigned SD_bit9: 1;
			unsigned SD_bita: 1;
			unsigned SD_bitb: 1;

			unsigned SD_bitc: 1;
			unsigned SD_bitd: 1;
			unsigned SD_bite: 1;
			unsigned SD_bitf: 1;

			unsigned SD_bit10: 1;
			unsigned SD_bit11: 1;
			unsigned SD_bit12: 1;
			unsigned SD_bit13: 1;

			unsigned SD_bit14: 1;
			unsigned SD_bit15: 1;
			unsigned SD_bit16: 1;
			unsigned SD_bit17: 1;

			unsigned SD_bit18: 1;
			unsigned SD_bit19: 1;
			unsigned SD_bit1a: 1;
			unsigned SD_bit1b: 1;

			unsigned SD_bit1c: 1;
			unsigned SD_bit1d: 1;
			unsigned SD_bit1e: 1;
			unsigned SD_bit1f: 1;
		} SD_bit;
	}; //194h-197h
} pruGPIO; //size = 198h

 

pruCFG.h is the header that contains useful functions that are important.

/* PRU_CFG register set */
/* See Table 4-207 in the  AM355x Sitara Processors Technical Reference Manual*/
/* See Table 4-7 for the base register (0x0002_6000) */
typedef struct{

	/* PRU_CFG_REVID register bit field */
	union {
		volatile unsigned int REVID;

		volatile struct {
			unsigned REVID : 32;
		} REVID_bit;
	} ;	// 0x0


	/* PRU_CFG_SYSCFG register bit field */
	union {
		volatile unsigned int SYSCFG;

		volatile struct{
			unsigned IDLE_MODE : 2;
			unsigned STANDBY_MODE : 2;
			unsigned STANDBY_INIT : 1;
			unsigned SUB_MWAIT : 1;
			unsigned rsvd6 : 26;
		} SYSCFG_bit;
	} ;	// 0x4


	/* PRU_CFG_GPCFG0 register bit field */
	union {
		volatile unsigned int GPCFG0;

		volatile struct{
			unsigned PRU0_GPI_MODE : 2;	// 1:0
			unsigned PRU0_GPI_CLK_MODE : 1;	// 2
			unsigned PRU0_GPI_DIV0 : 5;	// 7:3
			unsigned PRU0_GPI_DIV1 : 5;	// 12:8
			unsigned PRU0_GPI_SB : 1;	// 13
			unsigned PRU0_GPO_MODE : 1;	// 14
			unsigned PRU0_GPO_DIV0 : 5;	// 19:15
			unsigned PRU0_GPO_DIV1 : 5;	// 24:20
			unsigned PRU0_GPO_SH_SEL : 1;	// 25
			unsigned rsvd26 : 6;		// 31:26
		} GPCFG0_bit;
	} ;	// 0x8


	/* PRU_CFG_GPCFG1 register bit field */
	union {
		volatile unsigned int GPCFG1;

		volatile struct{
			unsigned PRU1_GPI_MODE : 2;	// 1:0
			unsigned PRU1_GPI_CLK_MODE : 1;	// 2
			unsigned PRU1_GPI_DIV0 : 5;	// 7:3
			unsigned PRU1_GPI_DIV1 : 5;	// 12:8
			unsigned PRU1_GPI_SB : 1;	// 13
			unsigned PRU1_GPO_MODE : 1;	// 14
			unsigned PRU1_GPO_DIV0 : 5;	// 19:15
			unsigned PRU1_GPO_DIV1 : 5;	// 24:20
			unsigned PRU1_GPO_SH_SEL : 1;	// 25
			unsigned rsvd26 : 6;		// 31:26
		} GPCFG1_bit;
	} ;	// 0xC


	/* PRU_CFG_CGR register bit field */
	union {
		volatile unsigned int CGR;

		volatile struct{
			unsigned PRU0_CLK_STOP_REQ : 1;	// 0
			unsigned PRU0_CLK_STOP_ACK : 1;	// 1
			unsigned PRU0_CLK_EN : 1;	// 2
			unsigned PRU1_CLK_STOP_REQ : 1;	// 3
			unsigned PRU1_CLK_STOP_ACK : 1;	// 4
			unsigned PRU1_CLK_EN : 1;	// 5
			unsigned INTC_CLK_STOP_REQ : 1;	// 6
			unsigned INTC_CLK_STOP_ACK : 1;	// 7
			unsigned INTC_CLK_EN : 1;	// 8
			unsigned UART_CLK_STOP_REQ : 1;	// 9
			unsigned UART_CLK_STOP_ACK : 1;	// 10
			unsigned UART_CLK_EN : 1;	// 11
			unsigned ECAP_CLK_STOP_REQ : 1;	// 12
			unsigned ECAP_CLK_STOP_ACK : 1;	// 13
			unsigned ECAP_CLK_EN : 1;	// 14
			unsigned IEP_CLK_STOP_REQ : 1;	// 15
			unsigned IEP_CLK_STOP_ACK : 1;	// 16
			unsigned IEP_CLK_EN : 1;	// 17
			unsigned rsvd18 : 14;		// 31:18
		} CGR_bit;
	} ;	// 0x10


	/* PRU_CFG_ISRP register bit field */
	union {
		volatile unsigned int ISRP;

		volatile  struct{
			unsigned PRU0_IMEM_PE_RAW : 4;	// 3:0
			unsigned PRU0_DMEM_PE_RAW : 4;	// 7:4
			unsigned PRU1_IMEM_PE_RAW : 4;	// 11:8
			unsigned PRU1_DMEM_PE_RAW : 4;	// 15:12
			unsigned RAM_PE_RAW : 4;	// 19:16
			unsigned rsvd20 : 12;		// 31:20
		} ISRP_bit;
	} ;	// 0x14


	/* PRU_CFG_ISP register bit field */
	union {
		volatile unsigned int ISP;

		volatile  struct{
			unsigned PRU0_IMEM_PE : 4;	// 3:0
			unsigned PRU0_DMEM_PE : 4;	// 7:4
			unsigned PRU1_IMEM_PE : 4;	// 11:8
			unsigned PRU1_DMEM_PE : 4;	// 15:12
			unsigned RAM_PE : 4;		// 19:16
			unsigned rsvd20 : 12;		// 31:20
		} ISP_bit;
	} ;	// 0x18

	/* PRU_CFG_IESP register bit field */
	union {
		volatile unsigned int IESP;

		volatile struct{
			unsigned PRU0_IMEM_PE_SET : 4;	// 3:0
			unsigned PRU0_DMEM_PE_SET : 4;	// 7:4
			unsigned PRU1_IMEM_PE_SET : 4;	// 11:8
			unsigned PRU1_DMEM_PE_SET : 4;	// 15:12
			unsigned RAM_PE_SET : 4;	// 19:16
			unsigned rsvd20 : 12;		// 31:20
		} IESP_bit;
	} ;	// 0x1C


	/* PRU_CFG_IECP register bit field */
	union {
		volatile unsigned int IECP;

		volatile struct{
			unsigned PRU0_IMEM_PE_CLR : 4;	// 3:0
			unsigned PRU0_DMEM_PE_CLR : 4;	// 7:4
			unsigned PRU1_IMEM_PE_CLR : 4;	// 11:8
			unsigned PRU1_DMEM_PE_CLR : 4;	// 15:12
			unsigned rsvd16 : 16;		// 31:16
		} IECP_bit;
	} ;	// 0x20


	unsigned int rsvd24;	// 0x24


	/* PRU_CFG_PMAO register bit field */
	union {
		volatile unsigned int PMAO;

		volatile struct{
			unsigned PMAO_PRU0 : 1;		// 0
			unsigned PMAO_PRU1 : 1;		// 1
			unsigned rsvd2 : 30;		// 31:2
		} PMAO_bit;
	} ;	// 0x28
 unsigned int rsvd2c[1]; // 0x2C


 /* PRU_CFG_IEPCLK register bit field */
 union {
 volatile unsigned int IEPCLK;

 volatile struct{
 unsigned OCP_EN : 1; // 0
 unsigned rsvd1 : 31; // 31:1
 } IEPCLK_bit;
 } ; // 0x30


 /* PRU_CFG_SPP register bit field */
 union {
 volatile unsigned int SPP;

 volatile struct{
 unsigned PRU1_PAD_HP_EN : 1; // 0
 unsigned XFR_SHIFT_EN : 1; // 1
 unsigned rsvd2 : 30; // 31:2
 } SPP_bit;
 } ; // 0x34


 unsigned int rsvd38[2]; // 0x38 - 0x3C


 union {
 volatile unsigned int PIN_MX;

 volatile struct {
 unsigned PIN_MUX_SEL : 8; // 7:0
 unsigned rsvd2 : 24; // 31:8
 } PIN_MX_bit;
 } ; //0x40
} pruCfg;

pruCTRL.h is the header that allows you to use control registers, for instance, for the real time loop.

/* PRU_CTRL register set */
typedef struct{

	/* PRU_CTRL_CONTROL register bit field */
	union {
		volatile unsigned CTRL;

		volatile struct{
			unsigned SOFT_RST_N : 1;
			unsigned EN : 1;
			unsigned SLEEPING : 1;
			unsigned CTR_EN : 1;
			unsigned rsvd4 : 4;
			unsigned SINGLE_STEP : 1;
			unsigned rsvd9 : 6;
			unsigned RUNSTATE : 1;
			unsigned PCTR_RST_VAL : 16;
		} CONTROL_bit;
	} ;	// 0x0


	/* PRU_CTRL_STATUS register bit field */
	union {
		volatile unsigned STS;

		volatile struct{
			unsigned PCTR : 16;
			unsigned rsvd16 : 16;
		} STATUS_bit;
	} ;	// 0x4


	/* PRU_CTRL_WAKEUP_EN register bit field */
	union {
		volatile unsigned WAKEUP_EN;

		volatile struct{
			unsigned BITWISE_ENS : 32;
		} WAKEUP_EN_bit;
	} ;	// 0x8


	/* PRU_CTRL_CYCLE register bit field */
	union {
		volatile unsigned CYCLE;

		volatile struct{
			unsigned CYCLECOUNT : 32;
		} CYCLE_bit;
	} ;	// 0xC


	/* PRU_CTRL_STALL register bit field */
	union {
		volatile unsigned STALL;

		volatile  struct{
			unsigned STALLCOUNT : 32;
		} STALL_bit;
	} ;	// 0x10


	unsigned rsvd14[3];	// 0x14 - 0x1C


	/* PRU_CTRL_CTBIR0 register bit field */
	union {
		volatile unsigned CTBIR0;

		volatile struct{
			unsigned C24_BLK_IDX : 8;
			unsigned rsvd8 : 8;
			unsigned C25_BLK_IDX : 8;
			unsigned rsvd24 : 8;
		} CTBIR0_bit;
	} ;	// 0x20


	/* PRU_CTRL_CTBIR1 register bit field */
	union {
		volatile unsigned CTBIR1;

		volatile struct{
			unsigned C26_BLK_IDX : 8;
			unsigned rsvd8 : 8;
			unsigned C27_BLK_IDX : 8;
			unsigned rsvd24 : 8;
		} CTBIR1_bit;
	} ;	// 0x24


	/* PRU_CTRL_CTPPR0 register bit field */
	union {
		volatile unsigned CTPPR0;

		volatile struct{
			unsigned C28_BLK_POINTER : 16;
			unsigned C29_BLK_POINTER : 16;
		} CTPPR0_bit;
	} ;	// 0x28


	/* PRU_CTRL_CTPPR1 register bit field */
	union {
		volatile unsigned CTPPR1;

		volatile struct{
			unsigned C30_BLK_POINTER : 16;
			unsigned C31_BLK_POINTER : 16;
		} CTPPR1_bit;
	} ;	// 0x2C

} pruCtrl;

/* Definition of control register structures. */
//#define PRU0_CTRL (*((volatile pruCtrl*)0x22000))
//#define PRU1_CTRL (*((volatile pruCtrl*)0x24000))


pruINTC.h is the header that allows you to use the INTC interface between PRU and ARM.

/*
 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * * Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *
 * * Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the
 * distribution.
 *
 * * Neither the name of Texas Instruments Incorporated nor the names of
 * its contributors may be used to endorse or promote products derived
 * from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _PRU_INTC_H_
#define _PRU_INTC_H_

/* PRU INTC register set */
typedef struct {

 /* PRU_INTC_REVID register bit field */
 union {
 volatile uint32_t REVID;

 volatile struct {
 unsigned REV_MINOR : 6; // 5:0
 unsigned REV_CUSTOM : 2; // 7:6
 unsigned REV_MAJOR : 3; // 10:8
 unsigned REV_RTL : 5; // 15:11
 unsigned REV_MODULE : 12; // 27:16
 unsigned rsvd28 : 2; // 29:28
 unsigned REV_SCHEME : 2; // 31:30
 } REVID_bit;
 }; // 0x0


 /* PRU_INTC_CR register bit field */
 union {
 volatile uint32_t CR;

 volatile struct {
 unsigned rsvd0 : 2; // 1:0
 unsigned NEST_MODE : 2; // 3:2
 unsigned rsvd4 : 28; // 31:4
 } CR_bit;
 }; // 0x4


 uint32_t rsvd8[2]; // 0x8 - 0xC


 /* PRU_INTC_GER register bit field */
 union {
 volatile uint32_t GER;

 volatile struct {
 unsigned EN_HINT_ANY : 1; // 0
 unsigned rsvd1 : 31; // 31:1
 } GER_bit;
 }; // 0x10


 uint32_t rsvd14[2]; // 0x14 - 0x18


 /* PRU_INTC_GNLR register bit field */
 union {
 volatile uint32_t GNLR;

 volatile struct {
 unsigned GLB_NEST_LEVEL : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } GNLR_bit;
 }; // 0x1C


 /* PRU_INTC_SISR register bit field */
 union {
 volatile uint32_t SISR;

 volatile struct {
 unsigned STS_SET_IDX : 10; // 9:0
 unsigned rsvd10 : 22; // 31:10
 } SISR_bit;
 }; // 0x20


 /* PRU_INTC_SICR register bit field */
 union {
 volatile uint32_t SICR;

 volatile struct {
 unsigned STS_CLR_IDX : 10; // 9:0
 unsigned rsvd10 : 22; // 31:10
 } SICR_bit;
 }; // 0x24


 /* PRU_INTC_EISR register bit field */
 union {
 volatile uint32_t EISR;

 volatile struct {
 unsigned EN_SET_IDX : 10; // 9:0
 unsigned rsvd10 : 22; // 31:10
 } EISR_bit;
 }; // 0x28


 /* PRU_INTC_EICR register bit field */
 union {
 volatile uint32_t EICR;

 volatile struct {
 unsigned EN_CLR_IDX : 10; // 9:0
 unsigned rsvd10 : 22; // 31:10
 } EICR_bit;
 }; // 0x2C


 uint32_t rsvd30; // 0x30


 /* PRU_INTC_HIEISR register bit field */
 union {
 volatile uint32_t HIEISR;

 volatile struct {
 unsigned HINT_EN_SET_IDX : 4; // 3:0
 unsigned rsvd4 : 28; // 31:4
 } HIEISR_bit;
 }; // 0x34


 /* PRU_INTC_HIDISR register bit field */
 union {
 volatile uint32_t HIDISR;

 volatile struct {
 unsigned HINT_EN_CLR_IDX : 4; // 3:0
 unsigned rsvd4 : 28; // 31:4
 } HIDISR_bit;
 }; // 0x38


 uint32_t rsvd3C[17]; // 0x3C - 0x7C


 /* PRU_INTC_GPIR register bit field */
 union {
 volatile uint32_t GPIR;

 volatile struct {
 unsigned GLB_PRI_INTR : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned GLB_NONE : 1; // 31
 } GPIR_bit;
 }; // 0x80


 uint32_t rsvd84[95]; // 0x84 - 0x1FC


 /* PRU_INTC_SRSR0 register bit field */
 union {
 volatile uint32_t SRSR0;

 volatile struct {
 unsigned RAW_STS_31_0 : 32; // 31:0
 } SRSR0_bit;
 }; // 0x200


 /* PRU_INTC_SRSR1 register bit field */
 union {
 volatile uint32_t SRSR1;

 volatile struct {
 unsigned RAW_STS_63_32 : 32; // 31:0
 } SRSR1_bit;
 }; // 0x204


 uint32_t rsvd208[30]; // 0x208 - 0x27C


 /* PRU_INTC_SECR0 register bit field */
 union {
 volatile uint32_t SECR0;

 volatile struct {
 unsigned ENA_STS_31_0 : 32; // 31:0
 } SECR0_bit;
 }; // 0x280


 /* PRU_INTC_SECR1 register bit field */
 union {
 volatile uint32_t SECR1;

 volatile struct {
 unsigned ENA_STS_63_32 : 32; // 31:0
 } SECR1_bit;
 }; // 0x284


 uint32_t rsvd288[30]; // 0x288 - 0x2FC


 /* PRU_INTC_ESR0 register bit field */
 union {
 volatile uint32_t ESR0;

 volatile struct {
 unsigned EN_SET_31_0 : 32; // 31:0
 } ESR0_bit;
 }; // 0x300


 /* PRU_INTC_ESR1 register bit field */
 union {
 volatile uint32_t ESR1;

 volatile struct {
 unsigned EN_SET_63_32 : 32; // 31:0
 } ESR1_bit;
 }; // 0x304


 uint32_t rsvd308[30]; // 0x308 - 0x37C


 /* PRU_INTC_ECR0 register bit field */
 union {
 volatile uint32_t ECR0;

 volatile struct {
 unsigned EN_CLR_31_0 : 32; // 31:0
 } ECR0_bit;
 }; // 0x380


 /* PRU_INTC_ECR1 register bit field */
 union {
 volatile uint32_t ECR1;

 volatile struct {
 unsigned EN_CLR_63_32 : 32; // 31:0
 } ECR1_bit;
 }; // 0x384


 uint32_t rsvd388[30]; // 0x388 - 0x3FC


 /* PRU_INTC_CMR0 register bit field */
 union {
 volatile uint32_t CMR0;

 volatile struct {
 unsigned CH_MAP_0 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_1 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_2 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_3 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR0_bit;
 }; // 0x400


 /* PRU_INTC_CMR1 register bit field */
 union {
 volatile uint32_t CMR1;

 volatile struct {
 unsigned CH_MAP_4 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_5 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_6 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_7 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR1_bit;
 }; // 0x404


 /* PRU_INTC_CMR2 register bit field */
 union {
 volatile uint32_t CMR2;

 volatile struct {
 unsigned CH_MAP_8 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_9 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_10 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_11 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR2_bit;
 }; // 0x408


 /* PRU_INTC_CMR3 register bit field */
 union {
 volatile uint32_t CMR3;

 volatile struct {
 unsigned CH_MAP_12 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_13 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_14 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_15 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR3_bit;
 }; // 0x40C


 /* PRU_INTC_CMR4 register bit field */
 union {
 volatile uint32_t CMR4;

 volatile struct {
 unsigned CH_MAP_16 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_17 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_18 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_19 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR4_bit;
 }; // 0x410


 /* PRU_INTC_CMR5 register bit field */
 union {
 volatile uint32_t CMR5;

 volatile struct {
 unsigned CH_MAP_20 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_21 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_22 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_23 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR5_bit;
 }; // 0x414


 /* PRU_INTC_CMR6 register bit field */
 union {
 volatile uint32_t CMR6;

 volatile struct {
 unsigned CH_MAP_24 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_25 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_26 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_27 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR6_bit;
 }; // 0x418


 /* PRU_INTC_CMR7 register bit field */
 union {
 volatile uint32_t CMR7;

 volatile struct {
 unsigned CH_MAP_28 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_29 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_30 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_31 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR7_bit;
 }; // 0x41C


 /* PRU_INTC_CMR8 register bit field */
 union {
 volatile uint32_t CMR8;

 volatile struct {
 unsigned CH_MAP_32 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_33 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_34 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_35 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR8_bit;
 }; // 0x420


 /* PRU_INTC_CMR9 register bit field */
 union {
 volatile uint32_t CMR9;

 volatile struct {
 unsigned CH_MAP_36 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_37 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_38 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_39 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR9_bit;
 }; // 0x424


 /* PRU_INTC_CMR10 register bit field */
 union {
 volatile uint32_t CMR10;

 volatile struct {
 unsigned CH_MAP_40 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_41 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_42 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_43 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR10_bit;
 }; // 0x428


 /* PRU_INTC_CMR11 register bit field */
 union {
 volatile uint32_t CMR11;

 volatile struct {
 unsigned CH_MAP_44 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_45 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_46 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_47 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR11_bit;
 }; // 0x42C


 /* PRU_INTC_CMR12 register bit field */
 union {
 volatile uint32_t CMR12;

 volatile struct {
 unsigned CH_MAP_48 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_49 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_50 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_51 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR12_bit;
 }; // 0x430


 /* PRU_INTC_CMR13 register bit field */
 union {
 volatile uint32_t CMR13;

 volatile struct {
 unsigned CH_MAP_52 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_53 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_54 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_55 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR13_bit;
 }; // 0x434


 /* PRU_INTC_CMR14 register bit field */
 union {
 volatile uint32_t CMR14;

 volatile struct {
 unsigned CH_MAP_56 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_57 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_58 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_59 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR14_bit;
 }; // 0x438


 /* PRU_INTC_CMR15 register bit field */
 union {
 volatile uint32_t CMR15;

 volatile struct {
 unsigned CH_MAP_60 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned CH_MAP_61 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned CH_MAP_62 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned CH_MAP_63 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } CMR15_bit;
 }; // 0x43C


 uint32_t rsvd440[240]; // 0x440 - 0x7FC


 /* PRU_INTC_HMR0 register bit field */
 union {
 volatile uint32_t HMR0;

 volatile struct {
 unsigned HINT_MAP_0 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned HINT_MAP_1 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned HINT_MAP_2 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned HINT_MAP_3 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } HMR0_bit;
 }; // 0x800


 /* PRU_INTC_HMR1 register bit field */
 union {
 volatile uint32_t HMR1;

 volatile struct {
 unsigned HINT_MAP_4 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned HINT_MAP_5 : 4; // 11:8
 unsigned rsvd12 : 4; // 15:12
 unsigned HINT_MAP_6 : 4; // 19:16
 unsigned rsvd20 : 4; // 23:20
 unsigned HINT_MAP_7 : 4; // 27:24
 unsigned rsvd28 : 4; // 31:28
 } HMR1_bit;
 }; // 0x804


 /* PRU_INTC_HMR2 register bit field */
 union {
 volatile uint32_t HMR2;

 volatile struct {
 unsigned HINT_MAP_8 : 4; // 3:0
 unsigned rsvd4 : 4; // 7:4
 unsigned HINT_MAP_9 : 4; // 11:8
 unsigned rsvd12 : 20; // 31:12
 } HMR2_bit;
 }; // 0x808


 uint32_t rsvd80C[61]; // 0x80C - 0x8FC


 /* PRU_INTC_HIPIR0 register bit field */
 union {
 volatile uint32_t HIPIR0;

 volatile struct {
 unsigned PRI_HINT_0 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_0 : 1; // 31
 } HIPIR0_bit;
 }; // 0x900


 /* PRU_INTC_HIPIR1 register bit field */
 union {
 volatile uint32_t HIPIR1;

 volatile struct {
 unsigned PRI_HINT_1 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_1 : 1; // 31
 } HIPIR1_bit;
 }; // 0x904


 /* PRU_INTC_HIPIR2 register bit field */
 union {
 volatile uint32_t HIPIR2;

 volatile struct {
 unsigned PRI_HINT_2 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_2 : 1; // 31
 } HIPIR2_bit;
 }; // 0x908


 /* PRU_INTC_HIPIR3 register bit field */
 union {
 volatile uint32_t HIPIR3;

 volatile struct {
 unsigned PRI_HINT_3 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_3 : 1; // 31
 } HIPIR3_bit;
 }; // 0x90C


 /* PRU_INTC_HIPIR4 register bit field */
 union {
 volatile uint32_t HIPIR4;

 volatile struct {
 unsigned PRI_HINT_4 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_4 : 1; // 31
 } HIPIR4_bit;
 }; // 0x910


 /* PRU_INTC_HIPIR5 register bit field */
 union {
 volatile uint32_t HIPIR5;

 volatile struct {
 unsigned PRI_HINT_5 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_5 : 1; // 31
 } HIPIR5_bit;
 }; // 0x914


 /* PRU_INTC_HIPIR6 register bit field */
 union {
 volatile uint32_t HIPIR6;

 volatile struct {
 unsigned PRI_HINT_6 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_6 : 1; // 31
 } HIPIR6_bit;
 }; // 0x918


 /* PRU_INTC_HIPIR7 register bit field */
 union {
 volatile uint32_t HIPIR7;

 volatile struct {
 unsigned PRI_HINT_7 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_7 : 1; // 31
 } HIPIR7_bit;
 }; // 0x91C


 /* PRU_INTC_HIPIR8 register bit field */
 union {
 volatile uint32_t HIPIR8;

 volatile struct {
 unsigned PRI_HINT_8 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_8 : 1; // 31
 } HIPIR8_bit;
 }; // 0x920


 /* PRU_INTC_HIPIR9 register bit field */
 union {
 volatile uint32_t HIPIR9;

 volatile struct {
 unsigned PRI_HINT_9 : 10; // 9:0
 unsigned rsvd10 : 21; // 30:10
 unsigned NONE_HINT_9 : 1; // 31
 } HIPIR9_bit;
 }; // 0x924


 uint32_t rsvd928[246]; // 0x928 - 0xCFC


 /* PRU_INTC_SIPR0 register bit field */
 union {
 volatile uint32_t SIPR0;

 volatile struct {
 unsigned POLARITY_31_0 : 32; // 31:0
 } SIPR0_bit;
 }; // 0xD00


 /* PRU_INTC_SIPR1 register bit field */
 union {
 volatile uint32_t SIPR1;

 volatile struct {
 unsigned POLARITY_63_32 : 32; // 31:0
 } SIPR1_bit;
 }; // 0xD04


 uint32_t rsvdD08[30]; // 0xD08 - 0xD7C


 /* PRU_INTC_SITR0 register bit field */
 union {
 volatile uint32_t SITR0;

 volatile struct {
 unsigned TYPE_31_0 : 32; // 31:0
 } SITR0_bit;
 }; // 0xD80


 /* PRU_INTC_SITR1 register bit field */
 union {
 volatile uint32_t SITR1;

 volatile struct {
 unsigned TYPE_63_32 : 32; // 31:0
 } SITR1_bit;
 }; // 0xD84


 uint32_t rsvdD84[222]; // 0xD88 - 0x10FC


 /* PRU_INTC_HINLR0 register bit field */
 union {
 volatile uint32_t HINLR0;

 volatile struct {
 unsigned NEST_HINT_0 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR0_bit;
 }; // 0x1100


 /* PRU_INTC_HINLR1 register bit field */
 union {
 volatile uint32_t HINLR1;

 volatile struct {
 unsigned NEST_HINT_1 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR1_bit;
 }; // 0x1104


 /* PRU_INTC_HINLR2 register bit field */
 union {
 volatile uint32_t HINLR2;

 volatile struct {
 unsigned NEST_HINT_2 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR2_bit;
 }; // 0x1108


 /* PRU_INTC_HINLR3 register bit field */
 union {
 volatile uint32_t HINLR3;

 volatile struct {
 unsigned NEST_HINT_3 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR3_bit;
 }; // 0x110C


 /* PRU_INTC_HINLR4 register bit field */
 union {
 volatile uint32_t HINLR4;

 volatile struct {
 unsigned NEST_HINT_4 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR4_bit;
 }; // 0x1110


 /* PRU_INTC_HINLR5 register bit field */
 union {
 volatile uint32_t HINLR5;

 volatile struct {
 unsigned NEST_HINT_5 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR5_bit;
 }; // 0x1114


 /* PRU_INTC_HINLR6 register bit field */
 union {
 volatile uint32_t HINLR6;

 volatile struct {
 unsigned NEST_HINT_6 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR6_bit;
 }; // 0x1118


 /* PRU_INTC_HINLR7 register bit field */
 union {
 volatile uint32_t HINLR7;

 volatile struct {
 unsigned NEST_HINT_7 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR7_bit;
 }; // 0x111C


 /* PRU_INTC_HINLR8 register bit field */
 union {
 volatile uint32_t HINLR8;

 volatile struct {
 unsigned NEST_HINT_8 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR8_bit;
 }; // 0x1120


 /* PRU_INTC_HINLR9 register bit field */
 union {
 volatile uint32_t HINLR9;

 volatile struct {
 unsigned NEST_HINT_9 : 9; // 8:0
 unsigned rsvd9 : 22; // 30:9
 unsigned AUTO_OVERRIDE : 1; // 31
 } HINLR9_bit;
 }; // 0x1124


 uint32_t rsvd1128[246]; // 0x1128 - 0x14FC


 /* PRU_INTC_HIER register bit field */
 union {
 volatile uint32_t HIER;

 volatile struct {
 unsigned EN_HINT : 10; // 9:0
 unsigned rsvd9 : 22; // 31:10
 } HIER_bit;
 }; // 0x1500

} pruIntc;

//ABW: put this in the c-file: volatile __far pruIntc CT_INTC __attribute__((cregister("PRU_INTC", far), peripheral));

#endif /* _PRU_INTC_H_ */

rscTypes.h is the header that allows you to use remoteproc communication.

/*
 * Copyright(c) 2011 Texas Instruments, Inc.
 * Copyright(c) 2011 Google, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * * Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * * Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in
 *   the documentation and/or other materials provided with the
 *   distribution.
 * * Neither the name Texas Instruments nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _RSC_TYPES_H_
#define _RSC_TYPES_H_

#include <stdint.h>

#define TYPE_PRU_INTS		1

struct ch_map {
	uint8_t evt;
	uint8_t ch;
};

struct fw_rsc_custom_ints {
	uint16_t version;
	uint8_t channel_host[10];
	uint32_t num_evts;
	struct ch_map *event_channel;
};



/* Size constants must match those used on host */
#define SZ_4K			(0x00001000)
#define SZ_8K			(0x00002000)

/* Resource info: Must match include/linux/remoteproc.h: */
#define TYPE_CARVEOUT		0
#define TYPE_DEVMEM		1
#define TYPE_TRACE		2
#define TYPE_VDEV		3
#define TYPE_INTMEM		4
#define TYPE_CUSTOM		5

union fw_custom {
	/* add custom resources here */
	struct fw_rsc_custom_ints pru_ints;
	/* maintain reserved as the last element */
	uint32_t reserved;
};

/* Common Resource Structure Types */

/**
 * struct resource_table - firmware resource table header
 * @ver: version number
 * @num: number of resource entries
 * @reserved: reserved (must be zero)
 *
 * A resource table is essentially a list of system resources required
 * by the remote processor. It may also include configuration entries.
 * If needed, the remote processor firmware should contain this table
 * as a dedicated ".resource_table" ELF section.
 *
 * Some resources entries are mere announcements, where the host is informed
 * of specific remoteproc configuration. Other entries require the host to
 * do something (e.g. allocate a system resource). Sometimes a negotiation
 * is expected, where the firmware requests a resource, and once allocated,
 * the host should provide back its details (e.g. address of an allocated
 * memory region).
 *
 * The header of the resource table, as expressed by this structure,
 * contains a version number (should we need to change this format in the
 * future), the number of available resource entries, and their offsets
 * in the table.
 *
 * Immediately following this header are the resource entries themselves,
 * each of which begins with a resource entry header (as described below).
 */
struct resource_table {
	uint32_t ver;
	uint32_t num;
	uint32_t reserved[2];
};

/**
 * struct fw_rsc_carveout - physically contiguous memory request
 * @type: type of resource
 * @da: device address
 * @pa: physical address
 * @len: length (in bytes)
 * @flags: iommu protection flags
 * @reserved: reserved (must be zero)
 * @name: human-readable name of the requested memory region
 *
 * This resource entry requests the host to allocate a physically contiguous
 * memory region.
 *
 * These request entries should precede other firmware resource entries,
 * as other entries might request placing other data objects inside
 * these memory regions (e.g. data/code segments, trace resource entries, ...).
 *
 * Allocating memory this way helps utilizing the reserved physical memory
 * (e.g. CMA) more efficiently, and also minimizes the number of TLB entries
 * needed to map it (in case @rproc is using an IOMMU). Reducing the TLB
 * pressure is important; it may have a substantial impact on performance.
 *
 * If the firmware is compiled with static addresses, then @da should specify
 * the expected device address of this memory region. If @da is set to
 * FW_RSC_ADDR_ANY, then the host will dynamically allocate it, and then
 * overwrite @da with the dynamically allocated address.
 *
 * We will always use @da to negotiate the device addresses, even if it
 * isn't using an iommu. In that case, though, it will obviously contain
 * physical addresses.
 *
 * Some remote processors needs to know the allocated physical address
 * even if they do use an iommu. This is needed, e.g., if they control
 * hardware accelerators which access the physical memory directly (this
 * is the case with OMAP4 for instance). In that case, the host will
 * overwrite @pa with the dynamically allocated physical address.
 * Generally we don't want to expose physical addresses if we don't have to
 * (remote processors are generally _not_ trusted), so we might want to
 * change this to happen _only_ when explicitly required by the hardware.
 *
 * @flags is used to provide IOMMU protection flags, and @name should
 * (optionally) contain a human readable name of this carveout region
 * (mainly for debugging purposes).
 */
struct fw_rsc_carveout {
	uint32_t type;
	uint32_t da;
	uint32_t pa;
	uint32_t len;
	uint32_t flags;
	uint32_t reserved;
	uint8_t name[32];
};

/**
 * struct fw_rsc_devmem - iommu mapping request
 * @type: type of resource
 * @da: device address
 * @pa: physical address
 * @len: length (in bytes)
 * @flags: iommu protection flags
 * @reserved: reserved (must be zero)
 * @name: human-readable name of the requested region to be mapped
 *
 * This resource entry requests the host to iommu map a physically contiguous
 * memory region. This is needed in case the remote processor requires
 * access to certain memory-based peripherals; _never_ use it to access
 * regular memory.
 *
 * This is obviously only needed if the remote processor is accessing memory
 * via an iommu.
 *
 * @da should specify the required device address, @pa should specify
 * the physical address we want to map, @len should specify the size of
 * the mapping and @flags is the IOMMU protection flags. As always, @name may
 * (optionally) contain a human readable name of this mapping (mainly for
 * debugging purposes).
 *
 * Note: at this point we just "trust" those devmem entries to contain valid
 * physical addresses, but this isn't safe and will be changed: eventually we
 * want remoteproc implementations to provide us ranges of physical addresses
 * the firmware is allowed to request, and not allow firmwares to request
 * access to physical addresses that are outside those ranges.
 */
struct fw_rsc_devmem {
	uint32_t type;
	uint32_t da;
	uint32_t pa;
	uint32_t len;
	uint32_t flags;
	uint32_t reserved;
	uint8_t name[32];
};

/**
 * struct fw_rsc_trace - trace buffer declaration
 * @type: type of resource
 * @da: device address
 * @len: length (in bytes)
 * @reserved: reserved (must be zero)
 * @name: human-readable name of the trace buffer
 *
 * This resource entry provides the host information about a trace buffer
 * into which the remote processor will write log messages.
 *
 * @da specifies the device address of the buffer, @len specifies
 * its size, and @name may contain a human readable name of the trace buffer.
 *
 * After booting the remote processor, the trace buffers are exposed to the
 * user via debugfs entries (called trace0, trace1, etc..).
 */
struct fw_rsc_trace {
	uint32_t type;
	uint32_t da;
	uint32_t len;
	uint32_t reserved;
	uint8_t name[32];
};

/**
 * struct fw_rsc_vdev_vring - vring descriptor entry
 * @da: device address
 * @align: the alignment between the consumer and producer parts of the vring
 * @num: num of buffers supported by this vring (must be power of two)
 * @notifyid is a unique rproc-wide notify index for this vring. This notify
 * index is used when kicking a remote processor, to let it know that this
 * vring is triggered.
 * @reserved: reserved (must be zero)
 *
 * This descriptor is not a resource entry by itself; it is part of the
 * vdev resource type (see below).
 *
 * Note that @da should either contain the device address where
 * the remote processor is expecting the vring, or indicate that
 * dynamically allocation of the vring's device address is supported.
 */
struct fw_rsc_vdev_vring {
	uint32_t da;
	uint32_t align;
	uint32_t num;
	uint32_t notifyid;
	uint32_t reserved;
};

/**
 * struct fw_rsc_vdev - virtio device header
 * @type: type of resource
 * @id: virtio device id (as in virtio_ids.h)
 * @notifyid is a unique rproc-wide notify index for this vdev. This notify
 * index is used when kicking a remote processor, to let it know that the
 * status/features of this vdev have changes.
 * @dfeatures specifies the virtio device features supported by the firmware
 * @gfeatures is a place holder used by the host to write back the
 * negotiated features that are supported by both sides.
 * @config_len is the size of the virtio config space of this vdev. The config
 * space lies in the resource table immediate after this vdev header.
 * @status is a place holder where the host will indicate its virtio progress.
 * @num_of_vrings indicates how many vrings are described in this vdev header
 * @reserved: reserved (must be zero)
 * @vring is an array of @num_of_vrings entries of 'struct fw_rsc_vdev_vring'.
 *
 * This resource is a virtio device header: it provides information about
 * the vdev, and is then used by the host and its peer remote processors
 * to negotiate and share certain virtio properties.
 *
 * By providing this resource entry, the firmware essentially asks remoteproc
 * to statically allocate a vdev upon registration of the rproc (dynamic vdev
 * allocation is not yet supported).
 *
 * Note: unlike virtualization systems, the term 'host' here means
 * the Linux side which is running remoteproc to control the remote
 * processors. We use the name 'gfeatures' to comply with virtio's terms,
 * though there isn't really any virtualized guest OS here: it's the host
 * which is responsible for negotiating the final features.
 * Yeah, it's a bit confusing.
 *
 * Note: immediately following this structure is the virtio config space for
 * this vdev (which is specific to the vdev; for more info, read the virtio
 * spec). the size of the config space is specified by @config_len.
 */
struct fw_rsc_vdev {
	uint32_t type;
	uint32_t id;
	uint32_t notifyid;
	uint32_t dfeatures;
	uint32_t gfeatures;
	uint32_t config_len;
	uint8_t status;
	uint8_t num_of_vrings;
	uint8_t reserved[2];
	struct fw_rsc_vdev_vring vring[0];
};

/**
 * struct fw_rsc_intmem - internal memory publishing request
 * @type: type of resource
 * @da: device address
 * @pa: physical address
 * @len: length (in bytes)
 * @reserved: reserved (must be zero)
 * @name: human-readable name of the region being published
 *
 * This resource entry allows a remote processor to publish an internal
 * memory region to the host. This resource type allows a remote processor
 * to publish the whole or just a portion of certain internal memories,
 * while it owns and manages any unpublished portion (eg: a shared L1
 * memory that can be split configured as RAM and/or cache). This is
 * primarily provided to allow a host to load code/data into internal
 * memories, the memory for which is neither allocated nor required to
 * be mapped into an iommu.
 *
 * @da should specify the required address as accessible by the device
 * without going through an iommu, @pa should specify the physical address
 * for the region as seen on the bus, @len should specify the size of the
 * memory region. As always, @name may (optionally) contain a human readable
 * name of this mapping (mainly for debugging purposes).
 *
 * Note: at this point we just "trust" these intmem entries to contain valid
 * physical bus addresses. these are not currently intended to be managed
 * as host-controlled heaps, as it is much better to do that from the remote
 * processor side.
 */

struct fw_rsc_intmem {
	uint32_t type;
	uint32_t da;
	uint32_t pa;
	uint32_t len;
	uint32_t reserved[2];
	char name[32];
};

/**
 * struct fw_rsc_custom - used for custom resource types
 * @type: type of resource
 * @sub_type: type of custom resource
 * @rsc_size: size of @rsc (in bytes)
 * @rsc: the custom resource
 *
 * This resource allows for custom resources specific to an architecture or
 * device.
 *
 * @type is the generic CUSTOM type, @sub_type is the specific custom resource,
 * @rsc_size is the length of @rsc (in bytes), and @rsc is the actual
 * parameters. These will be interpreted by the host-side device-specific
 * driver.
 */

struct fw_rsc_custom {
	uint32_t type;
	uint32_t sub_type;
	uint32_t rsc_size;
	union fw_custom rsc;
};

#endif /* _RSC_TYPES_H_ */

pruSYSMAILBOX.h is the header that allows you to use the mailbox feature of the ARM.

/*
 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *	* Redistributions of source code must retain the above copyright
 *	  notice, this list of conditions and the following disclaimer.
 *
 *	* Redistributions in binary form must reproduce the above copyright
 *	  notice, this list of conditions and the following disclaimer in the
 *	  documentation and/or other materials provided with the
 *	  distribution.
 *
 *	* Neither the name of Texas Instruments Incorporated nor the names of
 *	  its contributors may be used to endorse or promote products derived
 *	  from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _SYS_MAILBOX_H_
#define _SYS_MAILBOX_H_

/* SYS_MAILBOX register set */
typedef struct {

	/* SYS_MAILBOX_REVISION register bit field */
	union {
		volatile uint32_t REVISION;

		volatile struct {
			unsigned MINOR	: 6;		//5:0
			unsigned CUSTOM : 2;		//7:6
			unsigned MAJOR	: 3;		//10:8
			unsigned RTL	: 5;		//15:11
			unsigned FUNC	: 12;		//27:16
			unsigned rsvd28 : 2;		//29:28
			unsigned SCHEME : 2;		//31:30
		} REVISION_bit;
	};	// 0x0

	uint32_t rsvd4[3];		// 0x4 - 0xC

	/* SYS_MAILBOX_SYSCONFIG register bit field */
	union {
		volatile uint32_t SYSCONFIG;

		volatile struct {
			unsigned SOFTRESET	: 1;	//0
			unsigned rsvd		: 1;	//1
			unsigned SLIDLEMODE : 2;	//3:2
			unsigned rsvd1		: 28;	//31:4
		} SYSCONFIG_bit;
	};	// 0x10

	uint32_t rsvd14[11];		// 0x14 - 0x3C

	/* SYS_MAILBOX_MESSAGE register bit fields */
	union {
		volatile uint32_t MESSAGE[8];

		volatile struct {
			unsigned MESSAGE : 32;		//31:0
		} MESSAGE_bit[8];
	};	// 0x40-0x5C

	uint32_t rsvd60[8];		// 0x60 - 0x7C

	/* SYS_MAILBOX_FIFOSTATUS register bit fields */
	union {
		volatile uint32_t FIFOSTATUS[8];

		volatile struct {
			unsigned FIFOFULL	: 1;		//0
			unsigned rsvd		: 31;		//31:1
		} FIFOSTATUS_bit[8];
	};	// 0x80-0x9C

	uint32_t rsvdA0[8];		// 0xA0 - 0xBC

	/* SYS_MAILBOX_MSGSTATUS register bit fields */
	union {
		volatile uint32_t MSGSTATUS[8];

		volatile struct {
			unsigned NBOFMSG : 3;		//2:0
			unsigned rsvd	 : 29;		//31:3
		} MSGSTATUS_bit[8];
	};	// 0xC0-DC

	uint32_t rsvdE0[8];		// 0xE0 - 0xFC

	volatile struct {
		union {
			volatile uint32_t STATUS_RAW;

			volatile struct {
				unsigned NEWMSGSTATUSMB0	: 1;		//0
				unsigned NOTFULLSTATUSMB0	: 1;		//1
				unsigned NEWMSGSTATUSMB1	: 1;		//2
				unsigned NOTFULLSTATUSMB1	: 1;		//3
				unsigned NEWMSGSTATUSMB2	: 1;		//4
				unsigned NOTFULLSTATUSMB2	: 1;		//5
				unsigned NEWMSGSTATUSMB3	: 1;		//6
				unsigned NOTFULLSTATUSMB3	: 1;		//7
				unsigned NEWMSGSTATUSMB4	: 1;		//8
				unsigned NOTFULLSTATUSMB4	: 1;		//9
				unsigned NEWMSGSTATUSMB5	: 1;		//10
				unsigned NOTFULLSTATUSMB5	: 1;		//11
				unsigned NEWMSGSTATUSMB6	: 1;		//12
				unsigned NOTFULLSTATUSMB6	: 1;		//13
				unsigned NEWMSGSTATUSMB7	: 1;		//14
				unsigned NOTFULLSTATUSMB7	: 1;		//15
				unsigned rsvd				: 16;		//31:16
			} STATUS_RAW_bit;
		};
		union {
			volatile uint32_t STATUS_CLR;

			volatile struct {
				unsigned NEWMSGSTATUSMB0	: 1;		//0
				unsigned NOTFULLSTATUSMB0	: 1;		//1
				unsigned NEWMSGSTATUSMB1	: 1;		//2
				unsigned NOTFULLSTATUSMB1	: 1;		//3
				unsigned NEWMSGSTATUSMB2	: 1;		//4
				unsigned NOTFULLSTATUSMB2	: 1;		//5
				unsigned NEWMSGSTATUSMB3	: 1;		//6
				unsigned NOTFULLSTATUSMB3	: 1;		//7
				unsigned NEWMSGSTATUSMB4	: 1;		//8
				unsigned NOTFULLSTATUSMB4	: 1;		//9
				unsigned NEWMSGSTATUSMB5	: 1;		//10
				unsigned NOTFULLSTATUSMB5	: 1;		//11
				unsigned NEWMSGSTATUSMB6	: 1;		//12
				unsigned NOTFULLSTATUSMB6	: 1;		//13
				unsigned NEWMSGSTATUSMB7	: 1;		//14
				unsigned NOTFULLSTATUSMB7	: 1;		//15
				unsigned rsvd				: 16;		//31:16
			} STATUS_CLR_bit;
		};
		union {
			volatile uint32_t ENABLE_SET;

			volatile struct {
				unsigned NEWMSGSTATUSMB0	: 1;		//0
				unsigned NOTFULLSTATUSMB0	: 1;		//1
				unsigned NEWMSGSTATUSMB1	: 1;		//2
				unsigned NOTFULLSTATUSMB1	: 1;		//3
				unsigned NEWMSGSTATUSMB2	: 1;		//4
				unsigned NOTFULLSTATUSMB2	: 1;		//5
				unsigned NEWMSGSTATUSMB3	: 1;		//6
				unsigned NOTFULLSTATUSMB3	: 1;		//7
				unsigned NEWMSGSTATUSMB4	: 1;		//8
				unsigned NOTFULLSTATUSMB4	: 1;		//9
				unsigned NEWMSGSTATUSMB5	: 1;		//10
				unsigned NOTFULLSTATUSMB5	: 1;		//11
				unsigned NEWMSGSTATUSMB6	: 1;		//12
				unsigned NOTFULLSTATUSMB6	: 1;		//13
				unsigned NEWMSGSTATUSMB7	: 1;		//14
				unsigned NOTFULLSTATUSMB7	: 1;		//15
				unsigned rsvd				: 16;		//31:16
			} ENABLE_SET_bit;
		};
		union {
			volatile uint32_t ENABLE_CLR;

			volatile struct {
				unsigned NEWMSGSTATUSMB0	: 1;		//0
				unsigned NOTFULLSTATUSMB0	: 1;		//1
				unsigned NEWMSGSTATUSMB1	: 1;		//2
				unsigned NOTFULLSTATUSMB1	: 1;		//3
				unsigned NEWMSGSTATUSMB2	: 1;		//4
				unsigned NOTFULLSTATUSMB2	: 1;		//5
				unsigned NEWMSGSTATUSMB3	: 1;		//6
				unsigned NOTFULLSTATUSMB3	: 1;		//7
				unsigned NEWMSGSTATUSMB4	: 1;		//8
				unsigned NOTFULLSTATUSMB4	: 1;		//9
				unsigned NEWMSGSTATUSMB5	: 1;		//10
				unsigned NOTFULLSTATUSMB5	: 1;		//11
				unsigned NEWMSGSTATUSMB6	: 1;		//12
				unsigned NOTFULLSTATUSMB6	: 1;		//13
				unsigned NEWMSGSTATUSMB7	: 1;		//14
				unsigned NOTFULLSTATUSMB7	: 1;		//15
				unsigned rsvd				: 16;		//31:16
			} ENABLE_CLR_bit;
		};
	} IRQ[4];

} sysMailbox;

//volatile __far sysMailbox CT_MBX __attribute__((cregister("MBX0", far), peripheral));

#endif /* _SYS_MAILBOX_H_ */

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